ENHANCE: Enabling Heterogeneous Hardware Acceleration using Novel Programming and Scheduling Models
Overview
Key Facts
- Project duration:
- 04/2011 - 12/2013
- Funded by:
- BMBF
More Information
Publications
Performance-centric scheduling with task migration for a heterogeneous compute node in the data center
A. L?sch, T. Beisel, T. Kenter, C. Plessl, M. Platzner, in: Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–917.
Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing
T. Beisel, Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing, Logos Verlag Berlin GmbH, Berlin, 2015.
Parallel Macro Pipelining on the Intel SCC Many-Core Computer
T. Suess, A. Schoenrock, S. Meisner, C. Plessl, in: Proc. Int. Symp. on Parallel and Distributed Processing 365足彩投注_365体育投注@s (IPDPSW), IEEE Computer Society, Washington, DC, USA, 2013, pp. 64–73.
Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. 365足彩投注_365体育投注@ on Computer Architecture and Operating System Co-Design (CAOS), 2012.
Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend
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B. Meyer, C. Plessl, J. F?rstner, in: Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63.